I3A - Instituto de Investigación en Ingeniería de Aragón

About Us
About of us
About us
About us
About us
GAZComputer Architecture Group
http://webdiis.unizar.es/gaz/

The Computer Architecture Group at the University of Zaragoza (gaZ) is a research group whose core are professors at the Department of Computer and Systems Engineering (DIIS) at the University of Zaragoza integrated into the Engineering Research Institute of Aragon (I3A).
 
The common factor in our reserach is the search for simple mechanisms related to software and hardware memory hierarchy present in processors and multiprocessors. Our goal is to achieve higher speed, lower power consumption and ensure minimum response time. Our research projects are mainly financed by public agencies.
 
We participate in Society of Architecture and Computer Technology (SARTECO), that is engaged in scientific and technological devolpment of our country in relation to this field of research. We have been recongnized by the Autonomous Community of Aragón as research group (emerging in 2003 and consolidated since 2004). We are also member of the European Network of Excellence HiPEAC (High-Performance and Embedded Architecture and Compilation).

Research Lines

Information and Communication Technologies

A new generation of components and systems: Engineering of advanced and smart embedded components and systems
Next generation computing: Advanced computing systems and technologies
Micro- and nanoelectronics and photonics: Key enabling technologies related to micro- and nanoelectronics and to photonics

Key Projects

Information and Communication Technologies

Supercomputing and eScience, SyEC

SyEC offers a national framework for putting togheter research groups expert in supercomputing applications with hardware/software machine designers. A list of project goals follows:

    ...

SyEC offers a national framework for putting togheter research groups expert in supercomputing applications with hardware/software machine designers. A list of project goals follows:

  • Advancing supercomputing through collaboration between users and designers of hardware and software for supercomputers.
  • Encouraging the interrelationship between groups of researchers from the project.
  • Encouraging the creation of a broad culture of Supercomputing in Spain.
  • Influencing the design and efficient use of supercomputers.

Supercomputing and eScience, SyEC (2007-2013). IP: Mateo Valero, UPC, BSC-CNS. Funded by Spaninsh Government (Consolider-Ingenio2010, CSD2007-00050).

Interconnection and Memory in Scalable Computers

Concerning memory hierarchy, we propose to research on second-level and last-level shared caches (shared LP-NUCAs, hardware prefetching and replacement algorithms), memory hierarchy in GPGPUs (...

Concerning memory hierarchy, we propose to research on second-level and last-level shared caches (shared LP-NUCAs, hardware prefetching and replacement algorithms), memory hierarchy in GPGPUs (performance modelling, power consumption and thermal properties). We also propose caches for real-time systems, accurately characterizing the WCET for a greater number of components and proposing non-conventional management policies oriented to static analyzability. In addition, we look for new cache organizations at several levels, considering interconnection networks on-chip, specialized in servicing and migrating cache blocks.
IP: Víctor Viñals-Yúfera (gaZ-I3A). In collaboration with the Universidad de Cantabria, Santander, Spain. Funded by Spanish Ministry on Science and Innovation and ERDF (TIN2010-21291-C02-01 - 2011-2013).

HiPEAC3 - European Network of Excellence on High Performance and Embedded Architecture and Compilation

European Network of Excellence on High Performance and Embedded Architecture and Compilation. Ref. FET ICT-287759. European FP7-ICT Framework Programme for Research and Technological Development...

European Network of Excellence on High Performance and Embedded Architecture and Compilation. Ref. FET ICT-287759. European FP7-ICT Framework Programme for Research and Technological Development in Computing Systems (ICT-2011.3.4). 3.81 M€. NoE coordinator: Koen De Bosschere - Univ. Ghent - Belgium
The HiPEAC's mission is to

  • Steer and increase the European research in the area of high-performance and embedded computing systems.
  • Stimulate cooperation between
    • academia and industry
    • computer architects and tool builders

(January 2012 –December 2015)

Piregrid

PireGrid is a Spain-France border cooperation project funded by the European program Interreg IV A POCTEFA.  This project involves the creation of a fully functional grid computing platform in the...

PireGrid is a Spain-France border cooperation project funded by the European program Interreg IV A POCTEFA.  This project involves the creation of a fully functional grid computing platform in the regions of Aragón, Navarra, Aquitaine and Midi-Pyrénées, making the most of the high knowledge of the technology partners. The project has demonstrated its operation and potential in the regional industry, especially for the small and medium enterprises, accomplishing several success cases in areas of Engineering, Data Mining and Aerospace.  In the last year the project focused also in cloud technologies, spreading them among the industrial partners (2009-2012).

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